The present invention relates to a compound semiconductor device and a method of forming the same.
In manufacturing compound semiconductor devices, mainly silicon and compound semiconductor are used. Compound semiconductors such as GaAs and InP have electron mobilities which are higher than that of silicon, for which reason such the compound semiconductors are widely used for field effect transistors and hetero-junction bipolar transistors for microwave or milliwave devices or integrated circuits.
A conventional high output GaAs metal-semiconductor field effect transistor will be described with reference to FIGS. 1A and 1B. FIG. 1A is a fragmentary plane view illustrative of the conventional high output GaAs metal-semiconductor field effect transistor. FIG. 1B is a fragmentary cross sectional elevation view illustrative of the conventional high output GaAs metal-semiconductor field effect transistor taken along an A-A' line of FIG. 1A.
An n-GaAs active layer 2 is provided on a serni-insulating GaAs substrate 1. The n-GaAs active layer 2 has a recessed portion and ridged portions surrounding the recessed portion. Further, n-GaAs ohmic contact layers 3 are selectively formed on the ridged portions of the n-GaAs active layer 2. A highly resistive silicon dioxide passivation layer 7 acting as passivation is provided over the recessed portion of the n-GaAs active layer 2 and over the n-GaAs ohmic contact layers 3. Openings are provided to penetrate the highly resistive silicon dioxide passivation layer 7 so that a gate electrode 9 of tungsten silicide and source and drain electrodes 10 and 11 of AuGeNi are provided in the openings.
FIG. 2A is a fragmentary plane view illustrative of a conventional GaAs hetero-junction bipolar transistor. FIG. 2B is a fragmentary cross sectional elevation view illustrative of a conventional GaAs hetero-junction bipolar transistor taken along an A-A' line of FIG. 2A.
The conventional hetero-junction bipolar transistor is formed on a semi-insulating GaAs substrate 41. An n-GaAs collector layer 42 is provided on the semi-insulating GaAs substrate 41. A p-GaAs base layer 43 is provided on the n-GaAs collector layer 42. An n-AlGaAs emitter layer 44 is selectively provided on the p-GaAs base layer 43. A tungsten silicide emitter electrode 45 is provided on the n-AlGaAs emitter layer 44. Side wall silicon dioxide layers 46 are provided on side walls of the n-AlGaAs emitter layer 44 and the tungsten silicide emitter electrode 45 as well as over parts of the p-GaAs base layer 43 in the vicinity of the n-AlGaAs emitter layer 44. Further, AuMn base electrodes 49 are provided on the selected parts of the p-GaAs base layer 43 around the side wall silicon dioxide layers 46. An AuGeNi collector elcctrode 50 is selectively provided within an opening of the p-GaAs base layer 43 and on the n-GaAs collector layer 42.
The above conventional metal-semiconductor field effect transistor and the hetero-junction bipolar transistor have the common boundary structure of the compound semiconductor active region and the insulator passivation region. On such interface between the compound semiconductor active region and the insulator passivation region, a bond disordering is caused on the surface of the compound semiconductor due to inter-diffusion between insulator and compound semiconductor. Further, an oxidation of a surface of the compound semiconductor is caused. Such the bond disordering of the compound semiconductor surface and the surface oxidation thereof generate a large number of surface states.
In the field effect transistor, the surface states act as charge traps for capturing and releasing electrons whereby unstable phenomenons such as gate lag, resulting in deterioration of high frequency performances of the field effect transistor. On the other hands, the elections captured by the charge traps relax the field between the gate and drain whereby the high voltage characteristic of the field effect transistor is improved. Namely, the improvement in high frequency performance and improvement in the high voltage characteristic are in the trade-off relationship.
In the hetero-junction bipolar transistor, the surface states act as recombination centers for electrons and holes, for which reason as the bipolar transistor is scaled down, a ratio of the recombination current to the base current is increased, resulting in a drop of the current gain. Namely, the emitter side effects are caused.
To settle the above problems, it is necessary to provide a surface passivation for reduction in the surface state density. One of the passivation technique for reduction in the surface state density has been known and disclosed in Japanese journal of Applied Physics, Vol. 34, pp. 1143-1148, February 1995, wherein a thin epitaxial silicon layer of 1 nanometers in thickness is epitaxially grown on a compound semiconductor substrate for pseudo lattice matching between silicon and compound semiconductor before an insulation passivation layer is deposited on the epitaxial silicon layer.
Fabrication processes for the above passivation on the GaAs substrate will be described with reference to FIGS. 3A through 3C.
With reference to FIG. 3A, an epitaxial silicon layer 52 is epitaxially grown by a molecular beam epitaxy method on a GaAs substrate 51. The maximum thickness of the epitaxial silicon layer 52 is about 1 nanometer.
With reference to FIG. 3B, a silicon nitride layer 53 of about 1.5 nanometers in thickness is formed on the epitaxial silicon layer 52 in a photo-CVD system coupled through the same vacuum system to the molecular beam epitaxy system.
With reference to FIG. 3C, a silicon oxide film 54 is deposited by the photo-CVD method on the silicon nitride layer 53.
In the above passivation method, the epitaxial silicon layer 52 is pseudo lattice-matched with the GaAs substrate 51, for which reason on the interface between the epitaxial silicon layer 52 and the GaAs substrate 51, no bonding disordering is caused. Further, the silicon nitride layer 53 serves as an oxidation barrier layer which prevents oxidation of the epitaxial silicon layer 52 and the GaAs substrate 51 during the formation of the silicon oxide layer 54. Therefore, the increase in surface state density due to the interface bonding disordering and oxidation is suppressed.
The above surface passivation is, however, enagaged with the following problems. In order to prevent oxidation of the epitaxial silicon layer 52 during the formation of the silicon nitride layer 53, it is necessary that the epitaxial silicon layer 52 and the silicon nitride latter 53 are formed in the same vacuum system. This, however, results in scale up of the system and makes the system complicated as well as results in complicated processes and drop of the throughput of the device. In the normal systems, sample carrying paths other than process chambers have a vacuum in the order of 10.sup.-4 Torr. When the wafer is moved from the molecular beam epitaxy chamber to the photo-CVD chamber, the surface of the epitaxial silicon layer 52 may be oxidized. In order to prevent such oxidation of the epitaxial silicon layer 52 during carrying from the molecular beam epitaxy chamber to the photo-CVD chamber, it is required to keep the carrying path between the molecular beam epitaxy chamber and the photo-CVD chamber in a high vacuum state. Actually, however, it is difficult to maintain such ideal system.
Furthermore, when the GaAs field effect transistor is operated for a long time, an electrochemical reaction is caused at an edge of the gate in the vicinity of the drain whereby an oxidation of the GaAs active layer is caused. The above described conventional field effect transistors allow oxidation of the epitaxial silicon layers.
Moreover, in the above described conventional passivation technique, the epitaxial silicon layer is entirely formed on the wafer, for which reason it is impossible to form integration of a high frequency field effect transistor and a high voltage field effect transistor on the single wafer.
In the above circumstances, it had been required to develop a novel compound semiconductor device free from the above problems.